Qwen3.8-Flash-Next memory tiers: what fits in 16GB / 64·96GB / planned 128GB
Reading the 2026-08-26 Qwen3.8-Flash-Next (125B-A6B + 51B n-gram) from Unsloth GGUF, community MLX file sizes, and the official card only. Mapped onto the AI Tech Engine lab’s RTX 4080 16GB / M1 Max 64GB / M2 Max 96GB / planned 128GB. No unmeasured tok/s.
Qwen3.8-Flash-Next memory tiers: what fits in 16GB / 64·96GB / planned 128GB
Bottom Line Qwen3.8-Flash-Next, released 26 August 2026, is not the Qwen3.8-27B in the previous note. Official card: 125B backbone (6B active) + 51B n-gram embeddings + 4B MTP. Compute is sparse. Disk and resident size are workstation-class. Unsloth GGUF is about 72.5–111GB; community MLX 4-bit is 103.8GB. On today’s fleet (4080 16GB / M1 Max 64GB / M2 Max 96GB) the question is not “does it all fit in VRAM,” it is where n-gram and expert weights live. AMD AI Max+ 395 128GB and Gigabyte DGX Spark 128GB are still not here. This article has no tok/s from us.
This is not a copied bench table. It is where the files go, and where they stop, when AI Tech Engine tries Flash-Next — shipped the same week — on the fleet we actually have.
Official card — how it differs from 27B
Repo: Hugging Face Qwen/Qwen3.8-Flash-Next. MarkTechPost and community summaries list the license as qwen-community-1.0 (not Apache 2.0). Check the HF LICENSE yourself before commercial use or redistribution.
| Official text | How we read it | |
|---|---|---|
| Parameters | 125B (6B active) + 51B n-gram + 4B MTP | “6B active” is FLOPs. Disk/resident is an ~180B-class package |
| Type | Causal LM + Vision Encoder | Time text path and vision-on separately |
| Context | Native 262,144, YaRN up to 1,000,000 | Full 262K is not an assumption |
| Layout | 48 layers, 12 × (3 × (GDN→MoE) → 1 × (QSA→MoE)) |
Sparse attention, MoE, and n-gram together |
| N-gram | 20,000,000 bigram/trigram entries (layer 2) | Assumes host RAM/SSD offload. Not an accelerator-only problem |
| Serving | vLLM, SGLang, TokenSpeed, transformers, llama.cpp (GGUF) | Daily loop is llama.cpp / (Mac) MLX. We do not copy multi-GPU FP8 recipes as our result |
Checkpoint sizes cited by MarkTechPost: FP8 172.78 GiB, BF16 335.28 GiB. Sparse activation only cuts compute. It does not shrink storage.
We do not copy Qwen’s own bench tables or the “1/9 training cost” claim. The comparison set is the Qwen3.8-27B mapping and the M1 Max 27B timing. Flash-Next speed cells are still empty.
Community quant file sizes (not our measurements)
We did not re-measure these. They are document / card figures we use when planning a load.
Unsloth GGUF (unsloth/Qwen3.8-Flash-Next-GGUF, run guide)
| quant | listed size |
|---|---|
| UD-IQ1_S | 72.5 GB |
| UD-IQ1_M | 74.5 GB |
| UD-Q2_K_XL | 78.9 GB |
| UD-IQ3_XXS | 82.0 GB |
| UD-Q3_K_XL | 90.0 GB |
| UD-IQ4_XS | 93.7 GB |
| UD-Q4_K_XL | 111.3 GB |
Unsloth’s docs write “75GB RAM / unified memory, GPU VRAM not required” together with n-gram (PLE) SSD/host offload. That is their guide. It is not a promise the same numbers appear on our boxes.
llama.cpp side: community reports that qwen4exp / Flash-Next paths merged around 2026-08-27. This lab has not recorded a build commit or flags yet.
Community MLX (PipeNetwork table)
| build | listed size |
|---|---|
| bfloat16 (upstream) | 360.0 GB |
| 8-bit | 192.2 GB |
| 6-bit | 148.0 GB |
| mixed-4/8-bit | 106.2 GB |
| 4-bit | 103.8 GB |
The repo calls mixed-4/8-bit the build to use under 150GB, and says uniform 4-bit takes a large PPL hit (+20.6% vs bf16). Recommended MLX builds do not fit whole on M1 Max 64GB / M2 Max 96GB. Lines like ~354GB resident bf16 and ~24 tok/s are not our hardware. We do not copy them.
Split GGUF with n-gram on SSD (reference)
AtomicChat and others published builds that park n-gram shards on SSD and lower the in-memory ask (example: ~84.9–110.5GB total, ~45.8–56.1GB in-memory as listed). Even when a card says “64GB/96GB Mac guide,” this lab has not verified load, quality, or speed. We do not mix “someone claims it works” with “our needle.”
Fleet mapping — today vs planned
Numbers mean “is there somewhere for the file to live?”, not speed.
Today (on site)
| Path | RTX 4080 16GB | M1 Max 64GB MacBook | M2 Max 96GB Mac Studio |
|---|---|---|---|
| Official FP8/BF16 weights | No (172–335 GiB class) | No | No |
| Unsloth GGUF fully in RAM | No. 16GB VRAM ≪ 72–111GB | Tight to no even at 1-bit (72GB+). Their 75GB floor is already under 64GB | Borderline. Low-bit GGUF + short context is a candidate. Q4-class 111GB overflows |
| GGUF + n-gram/expert offload (llama.cpp CUDA/Metal) | Experiment candidate. Card holds active experts + KV; rest and n-gram on system RAM/SSD. To write “it ran,” quant, offload flags, and pass/fail travel together | Experiment candidate. Metal + mmap/SSD exists in the community; unmeasured here | Experiment candidate. More headroom than 64GB. Also unmeasured |
| MLX 4-bit / mixed (~104–106GB) | Not a target | Not recommended. File exceeds 64GB | Not recommended. File overflows 96GB or leaves no KV/vision room |
| Vision on | Tighter. Text first | Same | Same |
The 4080 16GB point is not “Flash-Next in VRAM.” It is whether 16GB compute + large system RAM can even smoke n-gram offload. That cell is still blank.
Planned (not arrived)
| Path | AMD AI Max+ 395 128GB Strix Halo (planned) | Gigabyte DGX Spark 128GB (planned) |
|---|---|---|
| Unsloth Q4-class GGUF (~93–111GB) | Target tier for weights + leftover KV | Same. CUDA/llama.cpp, vLLM if it applies |
| Runbook with n-gram on NVMe | ROCm/Vulkan path after arrival | Community Spark runbooks already exist. No install diary before it lands |
| MLX | Not Apple | Not Apple |
| Buy / availability (late-August 2026 snapshot) | Strix Halo 128GB mini-PCs mix sold-out and expensive reports on DRAM supply. We do not treat a price list as a bench | Founders/reseller MSRP bands are public; this lab has not confirmed an order or arrival |
We do not quote planned-box nameplates (200B inference and so on) as Flash-Next results.
How this relates to the 27B note
| Qwen3.8-27B mapping | This note (Flash-Next) | |
|---|---|---|
| Architecture | Dense 27B (+vision) | MoE 125B-A6B + 51B n-gram |
| 4-bit file scale | Unsloth ~14–18GB | Unsloth ~94–111GB (near Q4) |
| Workhorse today | The box it loads on (M1/M2 Max) | On boxes we hold, offload / split is the default assumption |
| Our tok/s | M1 Max timing exists | None |
Flash-Next is not “27B mapped again.” A same-week release opens the fleet’s empty cells (128GB) and offload experiments.
What this lab will measure next (Flash-Next)
Before 128GB arrives, only on hardware we hold.
- Load profile — same Unsloth GGUF on 4080 (CUDA offload) / M1 Max / M2 Max. Success, OOM, resident memory, flags used.
- Where the n-gram sits — RAM vs SSD (mmap). Do the listed in-memory savings reproduce on our boxes.
- Quality smoke — not just load. Short coding and instruction-following without collapse/loops. (No pasted bench scores.)
- Vision off, first — text. mmproj and video after that.
- After 128GB arrives — same files on Strix Halo and Spark; Q4-class resident + long context on the same needle.
What we will not do: treat Qwen/Unsloth/MLX repo tok/s as ours, extrapolate M5 Max / 5090 community speed onto 4080 / M1 / M2, write planned 128GB as already measured, or reuse the 27B timing table as a Flash-Next result.
File sizes and tier mapping are checked as of today. The speed column stays empty.
Cloud GPUs & engineering tools
Official sites (affiliate IDs pending)Affiliate tracking IDs have not been issued yet. The links below are official product sites. We do not invent fake ref/click IDs.
Hourly A100 / H100 / RTX 4090 rentals with one-click vLLM templates
Distributed GPU marketplace for local-LLM fine-tuning rentals
AI autocomplete and refactoring IDE